Verilog HDL Design Examples

Verilog HDL Design Examples Front Cover
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2017-09-26
665 pages

Book Description

The Verilog language provides a means to model a system at many levels of abstraction from a gate to a complex digital system to a mainframe computer. The purpose of this book is to present the Verilog language together with a wide variety of examples, so that the reader can gain a firm foundation in the of the digital system using Verilog HDL. The Verilog projects include the module, the test bench module, and the outputs obtained from the simulator that illustrate the complete functional operation of the . Where applicable, a detailed review of the theory of the topic is presented together with the design ―including: state diagrams, Karnaugh maps, equations, and the diagram. Numerous examples and homework problems are included throughout. The examples include logical operations, counters of different moduli, half adders, full adders, a carry lookahead adder, array multipliers, different types of Moore and Mealy machines, and arithmetic units (ALUs).

Table of Contents

Chapter 1 Introduction to Using Verilog HDL
Chapter 2 Combinational Logic Design Using Verilog HDL
Chapter 3 Sequential Logic Design Using Verilog HDL
Chapter 4 Computer Arithmetic Design Using Verilog HDL
Appendix A Event Queue
Appendix B Verilog Procedure
Appendix C Answers to Select Problems

Book Details

  • Title: Verilog HDL Design Examples
  • Author:
  • Length: 665 pages
  • Edition: 1
  • Language: English
  • Publisher:
  • Publication Date: 2017-09-26
  • ISBN-10: 1138099953
  • ISBN-13: 9781138099951