Handbook of Hardware/Software Codesign Front Cover

Handbook of Hardware/Software Codesign

  • Length: 1353 pages
  • Edition: 1st ed. 2017
  • Publisher:
  • Publication Date: 2017-11-01
  • ISBN-10: 9401772665
  • ISBN-13: 9789401772662
Description

This handbook presents fundamental knowledge on the hardware/software (HW/SW) codesign methodology. Contributing expert authors look at key techniques in the design flow as well as selected codesign tools and design environments, building on basic knowledge to consider the latest techniques. The book enables readers to gain real benefits from the HW/SW codesign methodology through explanations and case studies which demonstrate its usefulness.

Readers are invited to follow the progress of design techniques through this work, which assists readers in following current research directions and learning about state-of-the-art techniques. Students and researchers will appreciate the wide spectrum of subjects that belong to the design methodology from this handbook.

Table of Contents

Part I Introduction to Hardware/Software Codesign
Chapter 1 Introduction To Hardware/Software Codesign

Part II Models and Languages for Codesign
Chapter 2 Quartz: A Synchronous Language For Model-Based Design Of Reactive Embedded Systems
Chapter 3 Systemoc: A Data-Flow Programming Language For Codesign
Chapter 4 Forsyde: System Design Using A Functional Language And Models Of Computation
Chapter 5 Modeling Hardware/Software Embedded Systems With Uml/Marte: A Single-Source Design Approach

Part III Design Space Exploration
Chapter 6 Optimization Strategies In Design Space Exploration
Chapter 7 Hybrid Optimization Techniques For System-Level Design Space Exploration
Chapter 8 Architecture And Cross-Layer Design Space Exploration
Chapter 9 Scenario-Based Design Space Exploration
Chapter 10 Design Space Exploration And Run-Time Adaptation For Multicore Resource Management Under Performance And Power Constraints

Part IV Processor, Memory, and Communication ArchitectureDesign
Chapter 11 Reconfigurable Architectures
Chapter 12 Application-Specific Processors
Chapter 13 Memory Architectures
Chapter 14 Emerging And Nonvolatile Memory
Chapter 15 Network-On-Chip Design
Chapter 16 Noc-Based Multiprocessor Architecture For Mixed-Time-Criticality Applications

Part V Hardware/Software Cosimulation and Prototyping
Chapter 17 Parallel Simulation
Chapter 18 Multiprocessor System-On-Chip Prototyping Using Dynamic Binary Translation
Chapter 19 Host-Compiled Simulation
Chapter 20 Precise Software Timing Simulation Considering Execution Contexts

Part VI Performance Estimation, Analysis, and Verification
Chapter 21 Timing Models For Fast Embedded Software Performance Analysis
Chapter 22 Semiformal Assertion-Based Verification Of Hardware/Software Systems In A Model-Driven Design Framework
Chapter 23 Cpa: Compositional Performance Analysis
Chapter 24 Networked Real-Time Embedded Systems

Part VII Hardware/Software Compilation and Synthesis
Chapter 25 Hardware-Aware Compilation
Chapter 26 Memory-Aware Optimization Of Embedded Software For Multiple Objectives
Chapter 27 Microarchitecture-Level Soc Design

Part VIII Codesign Tools and Environment
Chapter 28 Maps: A Software Development Environment For Embedded Multicore Applications
Chapter 29 Hopes: Programming Platform Approach For Embedded Systems Design
Chapter 30 Daedalus: System-Level Design Methodology For Streaming Multiprocessor Embedded Systems On Chips
Chapter 31 Sce: System-On-Chip Environment
Chapter 32 Metamodeling And Code Generation In The Hardware/Software Interface Domain
Chapter 33 Hardware/Software Codesign Across Many Cadencetechnologies
Chapter 34 Synopsys Virtual Prototyping For Software Development And Early Architecture Analysis

Part IX Applications and Case Studies
Chapter 35 Joint Computing And Electric Systems Optimization For Green Datacenters
Chapter 36 The Dspcad Framework For Modeling And Synthesis Of Signal Processing Systems
Chapter 37 Control/Architecture Codesign For Cyber-Physical Systems
Chapter 38 Wireless Sensor Networks
Chapter 39 Codesign Case Study On Transport-Triggered Architectures
Chapter 40 Embedded Computer Vision

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