Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture Level

Book Description

Using a modern, pedagogical approach, this textbook gives students and engineers a comprehensive and rigorous knowledge of CMOS phase-locked loop (PLL) for a wide range of applications. It features intuitive presentation of theoretical concepts, built up gradually from their simplest form to more practical ; broad coverage of key topics, including oscillators, phase noise, analog PLLs, PLLs, RF synthesizers, delay-locked loops, clock and data recovery circuits, and frequency dividers; tutorial chapters on high- oscillator , covering to advanced topologies; and extensive use of circuit simulations to teach mentality, highlight flaws, and connect with practice. Including over 200 thought-provoking examples highlighting best practices and common pitfalls, 250 end-of-chapter homework problems to test and enhance the readers' understanding, and solutions and lecture slides for instructors, this is the perfect text for senior undergraduate and graduate-level students and professional engineers who want an in-depth understanding of PLL .

Book Details

  • Title: Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture Level
  • Author:
  • Length: 506 pages
  • Edition: 1
  • Language: English
  • Publisher:
  • Publication Date: 2020-03-12
  • ISBN-10: 1108494544
  • ISBN-13: 9781108494540
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