VMware vSphere 6.5 Host Resources Deep Dive Front Cover

VMware vSphere 6.5 Host Resources Deep Dive

  • Length: 607 pages
  • Edition: 1
  • Publication Date: 2017-07-23
  • ISBN-10: B0746H6DFC
  • Sales Rank: #167101 (See Top 100 Books)
Description

From the author of the vSphere Clustering Deep Dive series –

The VMware vSphere 6.5 Host Resources Deep Dive is a guide to building consistent high-performing ESXi hosts. A book that people can’t put down. Written for administrators, architects, consultants, aspiring VCDX-es and people eager to learn more about the elements that control the behavior of CPU, memory, storage and network resources.

This book shows that we can fundamentally and materially improve the systems we’re building. We can make the currently running ones consistently faster by deeply understanding and optimizing our systems.

The reality is that specifics of the infrastructure matter. Details matter. Especially for distributed platforms which abstract resource layers, such as NSX and vSAN. Knowing your systems inside and out is the only way to be sure you’ve properly handled those details. It’s about having a passion for these details. It’s about loving the systems we build. It’s about understanding them end-to-end.

This book explains the concepts and mechanisms behind the physical resource components and the VMkernel resource schedulers, which enables you to:

  • Optimize your workload for current and future Non-Uniform Memory Access (NUMA) systems.
  • Discover how vSphere Balanced Power Management takes advantage of the CPU Turbo Boost functionality, and why High Performance does not.
  • How the 3-DIMMs per Channel configuration results in a 10-20% performance drop.
  • How TLB works and why it is bad to disable large pages in virtualized environments.
  • Why 3D XPoint is perfect for the vSAN caching tier.
  • What queues are and where they live inside the end-to-end storage data paths.
  • Tune VMkernel components to optimize performance for VXLAN network traffic and NFV environments.
  • Why Intel’s Data Plane Development Kit significantly boosts packet processing performance.

Table of Contents

Cpu Architecture
System Architecture
Cache Coherency
Vmkernel Numa Constructs
Numa Scheduler
Cpu Scheduler
Host Power Management
Memory Resources
Prologue
Memory Architecture
Memory Subsystem Bandwidth
Memory Topology Design
Vmkernel Memory Management
Memory Reclamation Techniques
Storage Resources
Prologue
Host-Local Storage Architecture
Non-Volatile Memory Architecture
Vsan Storage Architecture
Core Storage
Virtual Machine Storage
Network Resources
Prologue
Host Network Architecture
Vmkernel Network
Virtual Machine Network
Vswitch Uplinks
Host Eviction
Distributed Storage Network
References

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